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PART NUMBER:
± 2g Tri-axis Digital
Accelerometer Specifications
KXR94-2353
Rev. 3
Nov-2010
In order to read the 8-bit control register, an 8-bit read command, 0x03, must be written to the accelerometer
to initiate the read. Upon receiving the command, the accelerometer returns the 8-bit operational-mode data
stored in the control register. This operation also occurs over 16 clock cycles. All returned data is sent MSB
first, and the host must return nCS high for at least 200nS before the next data request. Figure 3 shows the
timing diagram for an 8-bit control register read operation.
CLK
SDI
0
0
0
0
0
0
1
1
(MSB)
SDO
HI-Z
D7 D6 D5 D4 D3 D2 D1 D0
HI-Z
(MSB)
CS
Figure 3 Timing Diagram for 8-Bit Control Register Read Operation
Accelerometer Read Back Operation
The KXR94 has an onboard 12-bit ADC that can sample, convert and read back sensor data at any time.
Transmission of an 8-bit axis-conversion command (see Table 8) begins on the falling edge of nCS. After the
eight clock cycles used to send the command, the host must wait for at least 40μs during the A/D conversion
time. Note that all returned data is sent MSB first. Once the data is received, nCS must be returned high for
200nS before the next data request. Figure 4 and 5 this and on the following page show the timing and
register diagrams for the accelerometer 12-bit ADC read operation.
The Read Back Operation is a 3-byte SPI command. The first byte of SDI contains the command to convert
one of the axes. The second and third bytes of SDO contain the 12 bits of the A/D result plus four bits of
padding in the LSB to make a total of 16 bits. See Figure 5 on next page.
Conversion
CLK
SDI
A7 A6 A5 A4 A3 A2 A1 A0
(MSB)
SDO
HI Z
D11 D10 D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
HI Z
(MSB)
CS
Figure 4 Timing Diagram for an A/D conversion and 12-Bit data read operation.
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